National-instruments PCI-6023E User Manual Page 75
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Chapter 4 Signal Connections
PCI-6023E/6024E/6025E User Manual 4-46
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National Instruments Corporation
GPCTR1_SOURCE Signal
Any PFI pin can externally input the GPCTR1_SOURCE signal, which is
available as an output on the PFI3/GPCTR1_SOURCE pin.
As an input, the GPCTR1_SOURCE signal is configured in the
edge-detection mode. You can select any PFI pin as the source for
GPCTR1_SOURCE and configure the polarity selection for either rising or
falling edge.
As an output, the GPCTR1_SOURCE monitors the actual clock connected
to general-purpose counter 1. This is true even if the source clock is being
externally generated by another PFI. This output is set to tri-state at startup.
Figure 4-38 shows the timing requirements for the GPCTR1_SOURCE
signal.
Figure 4-38.
GPCTR1_SOURCE Signal Timing
The maximum allowed frequency is 20 MHz, with a minimum pulse width
of 23 ns high or low. There is no minimum frequency limitation.
The 20 MHz or 100 kHz timebase normally generates the
GPCTR1_SOURCE unless you select some external source.
GPCTR1_GATE Signal
Any PFI pin can externally input the GPCTR1_GATE signal, which is
available as an output on the PFI4/GPCTR1_GATE pin.
As an input, the GPCTR1_GATE signal is configured in edge-detection
mode. You can select any PFI pin as the source for GPCTR1_GATE and
configure the polarity selection for either rising or falling edge. You can use
the gate signal in a variety of different applications to perform such actions
as starting and stopping the counter, generating interrupts, saving the
counter contents, and so on.
t
p
t
w
t
w
t
p
t
w
= 50 ns minimum
= 23 ns minimum
PCI.book Page 46 Wednesday, September 16, 1998 9:09 AM
- PCI-6023E/6024E/6025E 1
- User Manual 1
- Important Information 3
- Contents 4
- Chapter 4 5
- About This Manual 10
- Related Documentation 12
- Introduction 13
- What You Need to Get Started 14
- Unpacking 14
- Software Programming Choices 15
- Chapter 1 Introduction 16
- Register-Level Programming 17
- Optional Equipment 18
- Software Installation 19
- Hardware Configuration 19
- Hardware Installation 20
- I/O Connector 21
- PCI Connector 21
- Analog Input 22
- Table 3-2 23
- Measurement Precision 23
- Chapter 3 Hardware Overview 24
- Analog Output 25
- Digital I/O 26
- Timing Signal Routing 26
- Programmable Function Inputs 27
- Board and RTSI Clocks 28
- RTSI Triggers 28
- Signal Connections 30
- Chapter 4 Signal Connections 31
- PCI-6024E, and PCI-6025E 33
- Analog Input Signal Overview 37
- Floating Signal Sources 38
- Analog Input Modes 38
- Signal Sources 43
- Sources (RSE Configuration) 47
- Sources (NRSE Configuration) 47
- Figure 4-9 49
- Analog Output Connections 49
- All Boards 50
- PCI-6025E Only 51
- Port C Pin Assignments 52
- Digital I/O Power-up State 53
- Timing Specifications 54
- Mode 1 Input Timing 56
- Mode 1 Output Timing 57
- Mode 2 Bidirectional Timing 58
- Power Connections 59
- Timing Connections 59
- DAQ Timing Connections 61
- SCANCLK Signal 62
- EXTSTROBE* Signal 62
- TRIG1 Signal 63
- = 50-100 ns 64
- STARTSCAN Signal 65
- = 10 ns minimum 67
- = 50-150 ns 68
- SISOURCE Signal 69
- WFTRIG Signal 69
- UPDATE* Signal 70
- UISOURCE Signal 71
- GPCTR0_SOURCE Signal 72
- GPCTR0_GATE Signal 73
- GPCTR1_SOURCE Signal 75
- GPCTR1_GATE Signal 75
- Field Wiring Considerations 78
- Calibration 80
- Self-Calibration 81
- External Calibration 81
- Other Considerations 82
- Specifications 83
- Accuracy Information 84
- Transfer Characteristics 85
- Amplifier Characteristics 85
- Dynamic Characteristics 86
- Stability 86
- Output Characteristics 86
- Voltage Output 88
- DIO<0..7> 89
- Timing I/O 90
- Triggers 90
- Digital Trigger 90
- Appendix A Specifications 91
- Custom Cabling and Optional 92
- Connectors 92
- Optional Connectors 93
- Common Questions 98
- Analog Input and Output 99
- Timing and Digital I/O 100
- Appendix C Common Questions 101
- Customer Communication 103
- Telephone and Fax Support 104
- Technical Support Form 105
- Configuration Form 106
- Documentation Comment Form 107
- Glossary 108
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